Supplier eBooks

The RF Design Handbook: Theory, Components, and Applications

Issue link: https://resources.mouser.com/i/1541351

Contents of this Issue

Navigation

Page 37 of 61

37 | In receivers, engineers usually want to ensure that the incoming signal fits within a relatively narrow threshold for an RF ADC to accept for optimum signal conversion quality while protecting the sensitive input of the ADC from overvoltage or potentially damaging or degrading signal content outside of the desired frequency range (Figure 1). For example, the minimum acceptable signal level for 2G cellular wireless service is −100 dBm, which equates to 1×10 −13 watts or: μ This is far below the acceptable voltage range for practical RF ADCs. In this case, an RF amplifier is needed, and filtering and other RF hardware may also be useful. In the case of transmission, the transmitter power requirements may exceed the digital circuits' capability to generate adequately powered signals without RFFE power amplifiers (PAs). Modern PA design often emphasizes efficiency, and methods such as digital pre- distortion and envelope tracking— which use digital technologies alongside analog amplifier circuits— are integrated into modern PA chips to enhance efficiency. PA circuits tend to be susceptible to loading effects, which may be challenging to address with on-chip signal- generation technology. In some cases, the sheer ruggedness of the PA circuit is key, such as the ability to withstand reflections and incoming high signal power at the PA output, which is often beyond the capabilities of digital circuits used to generate RF signals at any but the lowest power levels. How much of a system is digitized depends on the performance criteria, size, weight, power, and other system-level constraints. For RF systems with multiple RF channels, it may be beneficial to use DDC or an RF DAC and DDS to minimize the complexity of interconnects that would be involved in a fully analog system. As a function of digital sampling and processing criteria, wider bandwidths and higher frequencies require more capable digital systems to perform DDS and DDC. Current digital hardware is capable of gigasamples per second (GSPS) rates, with specialized hardware offering up to tens of GSPS. This means that the highest- performance DDS and DDC can convert and synthesize RF signals Figure 1: A diagram illustrating analog-to-digital signal conversion. (Source: NASA) 1

Articles in this issue

view archives of Supplier eBooks - The RF Design Handbook: Theory, Components, and Applications