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Xilinx - Programmable Single-Chip Adaptable Radio Platform

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Figure 2: The diagram shows how the Open CL structure enables a host program to use a standard compiler while the kernel uses a vendor-specific compiler. (Source: Xilinx) | 4 | | 22 | Accelerating with Vitis and OpenCL Vitis enables users to leverage the OpenCL framework to implement acceleration kernels within the programmable logic. These acceleration kernels have been defined using a higher-level language than a traditional RTL. OpenCL is an industry-standard framework that supports parallel computing on heterogeneous systems. One of the core principles behind OpenCL is to enable cross- platform functionality without the need for code changes. This allows the same code to be portable across CPUs, GPUs, FPGAs, DSPs, etc., with the performance scaling depending upon the platform's capabilities. OpenCL uses a host and kernel model (Figure 2). Each system will have one host, typically x86-based, and several kernels that provide the acceleration and are usually GPU-, DSP-, or FPGA-based. The host application is often developed in C/C++ and uses OpenCL APIs to support the OpenCL flow. These OpenCL APIs allow the Xilinx PRODUCT SPOTLIGHT USING SYSTEM GENERATOR FOR DSP FOR ZYNQ ULTRASCALE+ RFSOC s host to manage the entire application lifecycle of loading, configuring, and executing kernels. While supporting cross-platform portability, the kernel is developed using the OpenCL C language, based upon C but has limitations to support cross-platform portability. This model allows the host program to be compiled using a standard compiler such as GCC or G++, while the kernel compiler is vendor-specific. When working with Xilinx heterogeneous SoC devices, the Arm Application Processing Unit is the host, while the programmable logic instantiates kernels. Vitis provides the developer with everything required to generate, debug, and analyze both the host and kernel elements when targeting Xilinx heterogeneous SoC or acceleration cards. Vitis Platform To be able to leverage the Vitis OpenCL capabilities, a base platform is required. This base platform defines both

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