Issue link: https://resources.mouser.com/i/1542831
For example, each successive version of the specification has doubled the supported bandwidth without destabilizing the signaling model. Such reliable progression has given engineers confidence that systems they build today will continue to operate with next-generation devices. The architectural consistency also lets teams leverage legacy systems without rewriting entire I/O stacks. Still, despite clear generation-over-generation improvements to the protocol, many embedded systems continue to use legacy PCIe 1.0 through PCIe 4.0. This stagnation is mostly because, for many applications, legacy PCIe performance already meets their bandwidth requirements. For instance, systems on the factory floor rarely require 32- or 64-GT/s links when their primary task is moving modest sensor payloads or deterministic control messages. When more bandwidth isn't needed, sticking to previous versions of PCIe technology simplifies routing and significantly reduces PCB material costs. Higher-speed classes often require retimers, premium dielectrics, or advanced stackups, which can increase costs and power consumption without yielding meaningful benefits for typical industrial workloads. C h a p t e r 1 | P C I e f o r I / O a n d P e r i p h e r a l C o n n e c t i v i t y It takes time and commitment from the team to bring up a new architecture. Replacing the backbone of a system isn't easy, and PCIe has proven to be an easier adjustment. Rather than rewrite the whole architecture, you can upgrade to next generation of PCIe without entire rip-ups." Jesse Hawkins Hardware Design Engineer, Tektronix 10 8 Experts Discuss PCIe for Emerging Embedded Systems