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impedances, there has been a trend toward increasing current. We are familiar with
100- and 200-amp current requirements, but now we see customers asking for
1,000-amp current or higher. So engineers have to reduce the input resistance
of the package not only for the PDN but also for power dissipation and overall
system efficiency.
One approach is to create more efficient power MOSFETs with integrated drivers,
called driver MOSFET (DrMOS). There are basically two types. One uses separate
dies for the driver and FETs. It looks like one package, but they are discrete elements
inside the package. These provide efficiency advantages, but if you push the
frequency on them, you will run into thermal limitations from power loss. A better
approach is monolithic DrMOS, where a discrete driver and the power FET occupy
the same silicon. Each power cell has a small driver circuit next to it, which minimizes
the impedance between the drivers and the power FETs and enables us to push our
power stage to 2 megahertz without sacrificing much on the switching loss.
• Integrated packaging techniques. Another approach to increasing power density
and switching speed is to put a controller, driver, and FET on a substrate inside a
compact package. This approach minimizes distance from device to device, which
enables us to run the converter at a higher frequency. One example is ADI's LTM4700
power module, a 15-by-22–millimeter part that delivers 2-phase, 100-amp current.
It actually cuts the power supply size by at least half. You can greatly reduce PCB
interconnect impedance by placing a power module like that on the bottom side of a
PCB, directly beneath an ASIC of FPGA on the top side.
All these strategies work together to improve system efficiency and reduce both size
and cost.
'' All these
strategies work
together to
improve system
efficiency and
reduce both size
and cost."
