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Analog Devices - Power Management: Efficiently Powering Processors, FPGAs, and Microcontrollers

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C h a p t e r 4 | T h e F u t u r e o f P o w e r M a n a g e m e n t With more power being condensed into smaller form factors to push CPUs, GPUs, and FPGAs to new levels of computing performance both in terms of processing capability and speed, the heat has nowhere to go. Limited space exists for cooling as current density goes higher, and many devices are expected to go from zero to full load in fractions of a nanosecond. Power management must get smarter AI data centers are not the only driving force for power management going forward. As the edge is getting more intelligent, power management must do the same. Sequencers are a key enabler of that intelligence; the ability to change the sequencing of power supplies allows for more flexibility, better control, and higher accuracy of voltage references as well as the ability to better regulate and monitor wattage. This sequencing and other power management functions will be moved into the power supply itself so that they can communicate directly with the microcontrollers and FPGAs as part of a distributed management system. ADI's LT3074, a low-voltage, ultralow noise, and ultrafast transient response linear regulator with a Power Management Bus (PMBus) serial interface, is quickly becoming popular with data center customers—power management and high-speed communications protocols such as PMBus and the Serial Peripheral Interface will be essential in enabling customers to debug their systems more easily. A high- speed communications link is essential for dynamic voltage scaling because it supports changing voltage on the fly. When the voltage can be dropped easily, power consumption can be optimized by processors and FPGAs. Data center applications and AI applications are getting larger and larger with more GPUs and application-specific integrated circuits, and the ability to debug power management issues easily is critical to reducing risks during To ensure scalability and future-proofing, design engineers should account for changes in downstream component load conditions, battery chemistry, drain rate, and ground current of buck converters and LDOs." Ruben Sontale System Power Engineer, Watches, Google 23 Power Management: Efficiently Powering Processors, FPGAs, and Microcontrollers

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