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Engineering the Q-DPAK Architecture The Generation 2 Q-DPAK portfolio exemplifies how careful package design can improve performance. Available with RDS(on) values starting at 4 milliohms, these devices cover a wide range of power requirements. The package's symmetrical lead layout offers mechanical stability while supporting a larger die pad area. This larger pad serves two purposes: housing ultra-low RDS(on) dies capable of handling high currents and dispersing heat more effectively across the package surface. The increased thermal mass enhances heat dissipation directly. Safety considerations led to the addition of a molded groove between the die pad and the source-side lead. This feature increases the creepage distance to 4.8 millimeters—vital for high-voltage applications. Paired with Group 1 mold compound material, this extended creepage distance enables operation at RMS voltages up to 950V under Pollution Degree 2 conditions. High-voltage designers can now utilize fast-switching technology without compromising safety margins. All Q-DPAK variants maintain a consistent height of 2.3 millimeters, whether designed as single switches or split die pad versions supporting various switch- C h a p t e r 3 | I n f i n e o n ' s T o p - S i d e C o o l e d ( T S C ) Q - D P A K P a c k a g e diode combinations. This uniformity simplifies thermal solution design across different circuit topologies. Manufacturing efficiency was also a key factor: a 150-micrometer positive standoff raises the package body above the lead edges. This elevation allows the use of standard-height stencils during reflow soldering and eliminates the need for extra board cleaning steps before component placement. What might seem like a minor detail actually streamlines the entire assembly process. 14 Enabling Compact, Efficient Designs with High Voltage CoolSiC™ Discretes