Figure 12: Basic NFET Colpitts oscillator, with switchable R
GATE
added.
(Source: Analog Devices)
Figure 13: Scope capture showing oscillations die off as R
GATE
is stepped.
(Source: Analog Devices)
Conclusion
This article has covered the theory of parasitic FET oscillation,
validated the Colpitts model through experimentation on the
bench, replicated the issue on a demo board, and resolved the
issue with the well-known solution. Placing a 10Ω gate resistor
as close as possible to the FET's gate pin separates the parasitic
inductance of the PCB trace from the input capacitance of the
FET. This eliminates the potential for gate ringing or oscillations
and can spare the user hours of troubleshooting and a board
respin, all at the cost of a single surface-mount resistor
Adobe Stock / Pavel Timofeev – stock.adobe.com
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Advanced Power Solutions for Efficiency and Robustness | ADI
