Table 1 compares the extracted PCB ESRs and ESLs of the hot
loops by FastHenry. As expected, the vertical hot loop 1 has the
lowest PCB ESR and ESL.
Table 1: Extracted PCB ESRs and ESLs in different hot loops using
FastHenry (Source: Analog Devices)
Hot Loop
ESR (ESR
1
+ ESR
2
)
at 600kHz (mΩ)
ESL (ESL
1
+ ESL
2
)
at 200MHz (nH)
Vertical Hot Loop 1 0.7 0.54
Vertical Hot Loop 2 2.5 1.17
Horizontal Hot Loop 3.3 0.84
To experimentally verify the ESRs and ESLs in different hot loops,
the demo board efficiency and V
IN
AC ripple at 12V to 1V CCM
operation are tested. Theoretically, a lower ESR leads to higher
efficiency, and smaller ESL results in higher V
SW
ringing frequency
and lower V
IN
ripple magnitude. Figure 5a shows the measured
efficiency. The vertical hot loop 1 gives the highest efficiency that
corresponds to the lowest ESR. The loss difference between the
horizontal hot loop and vertical hot loop 1 is also calculated based
on the extracted ESRs, which is consistent with the testing result,
as shown in Figure 5b. The V
IN
HF ripple waveforms in Figure 5c
are tested crossing C
IN
. The horizontal hot loop has a higher V
IN
ripple magnitude and a lower ringing frequency, thus validating the
higher loop ESL compared to the vertical hot loop 1. Also, because
of the higher loop ESR, the V
IN
ripple in the horizontal hot loop
damps faster than in the vertical hot loop 1. Furthermore, a lower
V
IN
ripple reduces EMI and allows a smaller EMI filter size.
Figure 5: Demo board testing results: (a) efficiency, (b) loss difference
between horizontal loop and vertical Loop 1, and (c) VIN ripple during M1
turn-on at 15A output. (Source: Analog Devices)
Adobe Stock / romaset – stock.adobe.com
12
ADI | Powering the Future
