Rethinking Moore’s Law in Modern Semiconductor Design

For half a century, Moore’s Law has served as the foundation of progress in the semiconductor industry. In 1965, Gordon Moore predicted that the number of transistors on an integrated circuit would continue to increase at a steady pace, eventually settling into a roughly two-year doubling cycle. That pattern held long enough to become more than a prediction; it became an expectation that shaped the entire electronics industry.

This expectation drove everything from early personal computers to cloud infrastructure to more recent artificial intelligence workloads. Engineers and companies didn’t just follow Moore’s Law; they built road maps around it. They aligned product life cycles, performance targets, and strategies for their designs and business.

Today, that pattern of Moore’s Law is becoming harder to maintain. As transistors shrink to near-atomic dimensions, constraints such as heat density, quantum effects, and the rising cost of advanced fabrication are becoming more pronounced in the industry. These challenges have led many technologists to question whether the prediction of Moore’s Law has reached its end.
For decades, think pieces, discussion board threads, and search trends have asked when Moore’s Law has ended. But a more useful question may be whether it truly ended or simply evolved into something new.

The Origin of Moore’s Law

Moore’s Law traces back to a 1965 paper by Gordon Moore, co-founder of Intel®.  Moore observed that the number of components on an integrated circuit was doubling every year. A decade later, this projection was revised to a doubling roughly every two years. That pace held for decades.
In the early days of semiconductor engineering and design, this trend reflected the rapid innovation in fabrication processes, materials, and design methodologies. Many companies recognized that maintaining this scaling trend would provide a competitive advantage, and the industry began aligning around the concept as a benchmark.

Moore’s Law quickly made a profound impact on engineering progress. Increasing transistor density enabled significant gains in computing power while simultaneously reducing cost per transistor. This combination made computing more accessible and predictable, allowing companies to confidently plan future products.

As a result, Moore’s Law became more than an observation and began guiding the design and development of new chips.

The Golden Era of Scaling

The success of Moore’s Law was closely tied to another principle, Dennard scaling.  This principle suggests that as transistors became smaller, their power density would remain constant, so performance could increase without increasing power consumption.
During this time, process nodes shrank from micrometer-scale dimensions to nanometer-scale dimensions. Each new generation improved performance while reducing power per transistor.
This era led to the growth of personal computing, mobile devices, and eventually large-scale cloud infrastructure. Packing more transistors onto a chip without a major increase in power consumption enabled engineers to keep pushing performance without sacrificing efficiency. This combination ofMoore’s Law and Dennard scaling created a new cycle of innovation, setting the stage for modern electronics.

The Physical and Economic Limits of Traditional Scaling 

As semiconductor manufacturing approaches atomic-scale dimensions, the physical, thermal, and economic limits of traditional silicon-based scaling are becoming harder to ignore.One of the biggest challenges is the emergence of quantum effects. At extremely small geometries, phenomena such as electron tunneling and leakage currents begin to interfere with transistor operation, reducing reliability and efficiency. These effects introduce variability that is difficult to control at scale.

Thermal constraints also limit performance. As transistor density increases, so does power density, making heat dissipation a major design challenge. Even when transistors are made smaller, removing the heat they generate becomes a limiting factor in overall performance.

The challenges and limitations also branch into the manufacturing process. Lithography has become more complex.  Techniques such as extreme ultraviolet (EUV) lithography require highly specialized equipment and processes, which increases fabrication costs. Modern semiconductor fabrication facilities now require major investments in tens of billions of dollars.  

These constraints indicate that scaling has not stopped, but that the benefits are no longer automatic or linear. Each new node requires increasingly complex engineering, and the performance gains per generation are waning.

So, Is Moore’s Law Dead?

Whether or not Moore’s Law is “dead” is still being debated across the semiconductor industry.
Critics point to slower node transitions and reduced performance-per-watt improvements as signs that traditional scaling is no longer sustainable.  They also point out the escalating manufacturing costs. The historical pace of transistor doubling, along with the benefits it offered, has clearly slowed.

Others argue that Moore’s Law is not dead but has changed.  Transistor density is still increasing, but at a slower rate, and design strategies have had to shift beyond simple scaling. Instead of relying solely on density, the industry is now drawing on a broader set of approaches to keep performance moving forward. 

New Paths to Performance

As scaling slows, engineers are exploring new design and integration strategies to keep improving performance. 

Advanced Packaging and Chiplets

Designers are moving away from monolithic dies and toward advanced packaging and chiplet-based architectures.  Instead of building a single monolithic die, they can integrate multiple smaller dies into a single package. This approach enables heterogeneous integration, combining components such as central processing units (CPUs), graphics processing units (GPUs), and memory in a modular fashion. Breaking a design into smaller dies makes manufacturing more forgiving. Yields tend to be higher, and it’s easier to mix and match components without driving up cost.

Modern processors use these architectures to improve performance without depending only on transistor scaling.

New Transistor Architectures

As traditional planar transistor designs reached their limits, new structures like fin field-effect transistors (FinFETs) emerged. FinFETs signaled the first big step away from planar designs, using a raised fin structure that allowed the gate to wrap around the channel for better control and reduced leakage.   This was followed by more advanced designs, such as gate-all-around (GAA) transistors, in which the gate surrounds the channel on all sides rather than just a few sides, further reducing leakage. New variations, such as nanosheet and nanowire transistors, are built on this concept by refining the channel structure. Instead of relying on smaller dimensions, performance improvements can now come from how transistors are physically built. 

Alternative Materials

Silicon is still the foundation of most logic devices, but its limitations have driven research toward other materials. Gallium nitride (GaN) and silicon carbide (SiC) are already used in power and high-frequency designs, where they handle higher voltages and temperatures more efficiently. They work well in those roles, but they don’t replace silicon in dense logic.

Much research is being done on materials such as graphene and molybdenum disulfide (MoS₂) for future transistors. These materials behave differently at very small scales and could support new device structures.  While they are not ready for production, they indicate the direction of the industry as silicon approaches its limits.

Specialized Computing Architectures

Computing is also becoming more specialized. Instead of relying on general-purpose CPUs for all workloads, designers are building processors that are tailored to specific tasks. This includes artificial intelligence (AI) accelerators, GPUs, and field-programmable gate arrays (FPGAs).
These architectures improve performance by matching the hardware to the task, whether it’s machine learning or real-time data processing. Instead of expecting a single design to handle all tasks, performance gains are coming from targeting specific workloads. 

3D Integration

Another approach is to build upward rather than shrink further. By stacking dies vertically and connecting them with through-silicon vias (TSVs), engineers can increase density without shrinking individual transistors. This design concept brings components closer together, improving bandwidth and reducing latency. It is already used in high-bandwidth memory and processor designs, and its role is expected to grow in future systems as traditional scaling becomes harder. 

Software and System-Level Gains

As hardware scaling slows, more of the gains are coming from software and system-level optimization. Hardware–software co-design lets engineers tune the full system, not just the chip. Improvements in compilers, parallel processing, and AI-based optimization are helping extract more performance from the existing hardware. Such improvements move the focus away from transistor count and toward overall system efficiency. 

What Comes Next?

Several emerging technologies could lead the next phase of computing and carry forward the same drive for performance that defined Moore’s Law. There is extensive research on quantum computing for problems that are difficult or impractical for classical systems, especially in optimization and cryptography.  Neuromorphic designs aim to mimic aspects of the brain for efficient pattern recognition and learning.  Photonic approaches use light instead of electrons to move data faster and with lower energy loss. 

There is also growing interest in how these technologies might work alongside existing systems rather than replacing them. Hybrid approaches, in which classical processors handle general workloads and specialized systems handle targeted tasks, are already in development. 
These technologies are still in their early stages, but they indicate how the model is changing. Moore’s Law made sense because shrinking transistors delivered repeatable gains. Since that relationship no longer holds in the same way, improvements are now coming from a combination of approaches rather than scaling alone.

Conclusion

Moore’s Law defined steady technological progress for many years, but the path forward looks different. Its spirit is still very alive, and scaling continues, but it’s not the only driver. Progress now comes from a combination of architecture, integration, and system-level design.